1. Field of the Invention
The invention generally relates to a photo mask and a method for manufacturing a semiconductor device using the same. More specifically, the invention relates to semiconductor manufacturing technology utilizing an asymmetric illuminator that can prevent the occurrence of a necking phenomenon at a connecting portion of two patterns during a photolithography process.
2. Brief Description of Related Technology
Semiconductor devices and integrated circuits are becoming more highly-integrated. As a result, research is on-going to improve characteristics of these devices and circuits, and to secure desirable process margins. In semiconductor memory devices, as the memory capacity of such devices increases, a critical dimension of patterns in the device is reduced. As a result, photolithography processes for forming a pattern over a wafer are important in a microlithography process.
Resolution enhancement technology has been widely used in photolithography as the pattern size of semiconductor devices becomes smaller and as new structures for semiconductor devices are developed. In one of the resolution enhancement technologies, an asymmetric illuminator (e.g., a dipole illuminator) is used in the photolithography process. When a dipole illuminator is introduced, a line and space can be formed to be finer. FIG. 1 is a plane diagram illustrating a general dipole illuminator. Generally, the dipole illuminator comprises a light protection region 1 having a circular shape and a pair of floodlight units 2 facing each other in a direction X or Y. Since the dipole illuminator is directional, a pattern obtained by performing an exposure process using the dipole illuminator has a resolution increased toward one direction but decreased toward the other direction. In other words, when the floodlight unit 2 is disposed in the direction Y, as shown in the dipole illuminator of FIG. 1, a pattern of the direction X has an increased resolution but a pattern of the direction Y has a decreased resolution.
FIG. 2 is a diagram illustrating a conventional photo mask. As shown in FIG. 2, a line pattern 11 is connected to one side of an island pattern 13 in the photo mask. A critical dimension (CD) of the island pattern 13 is three times larger than that of the line pattern 11. For example, while the island pattern 13 is a contact pad formed in a peripheral circuit unit, the line pattern 11 is a conductive line (i.e., a word line, a bit line, or a metal line) connected to a cell unit.
FIG. 3 is a plane diagram illustrating a pattern formed over a semiconductor substrate by photolithography with the photo mask of FIG. 2. As shown in FIG. 3, a necking phenomenon a (and shown within the region defined by the dashed circle) occurs at a portion where the line pattern 11 is connected to the island pattern 13 of FIG. 2.
FIGS. 4 to 6 illustrate the photo mask of FIG. 2 and its simulation results. Referring to FIGS. 4 and 5, a plurality of line patterns 21 and a plurality of island patterns 23 are formed on a substrate of the photo mask. The line patterns 21 are connected to the island patterns 23.
In general, the island pattern 23 is a contact pad, and the line pattern 21 is a conductive line. The contact pad has a CD three times larger than that of the conductive line. The line pattern 21 and the island pattern 23 may together form a test pattern. To prevent the necking phenomenon (shown in FIG. 3), optical proximity correction (OPC) is performed at the connecting portion (shown within the region “b” defined by the dashed circle in FIG. 4) of the line pattern 21 and the island pattern 23. FIG. 5 is a more detailed illustration of region “c” (defined by the dashed square) of FIG. 4. As shown in region “c” of FIG. 5, a dashed line 25 represents a pattern layout before the OPC.
A method for forming a photo mask using the layout of FIG. 4 includes: forming a shading film over a quartz substrate; covering the shading film with an electric beam photoresist film; exposing and developing the photoresist film with an electron gun programmed according to the layout of FIG. 4 to form a photoresist pattern; and etching the shading film with the photoresist pattern as a mask, and removing the photoresist pattern to obtain the photo mask.
The OPC is performed on all necessary parts as well as the connecting portion of the line pattern 21 and the island pattern 23.
FIG. 6 is a plane diagram illustrating a pattern formed over the semiconductor substrate by photolithography with the photo mask of FIG. 4. As shown in FIG. 6, the necking phenomenon occurs at portions where the line patterns and the island patterns connect.
FIG. 7 is a diagram illustrating change of depth of focus (DOF) due to other factors than those of FIG. 2 to 6. As shown in FIG. 7, continuous photolithography heats the lens and, thereby undesirably alters the lens refraction and undesirably changes the best focus of the lens. As a result, the DOF is changed. In FIG. 7, the image on the left shows the best focus before lens heating, and the image on the right shows the best focus after lens heating. As shown by these images, the best focus has drifted. The drift causes a shortening, resulting from the necking phenomenon of FIG. 8 and a bridge between neighboring patterns. The change of the best focus may cause the problems illustrated in FIGS. 2 to 6.
The conventional photo mask and the conventional method for manufacturing a semiconductor device using the conventional photo mask cause a necking phenomenon between two patterns each having a different CD by three times or more, and also bring about a shortening of the two patterns and a bridge between other neighboring patterns, thereby degrading productivity and yield of the semiconductor device.